Lead Application Engineer – Belo Horizonte

Cadence Design Systems está com vaga(s) de emprego para Lead Application Engineer – Belo Horizonte em Belo Horizonte

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Lead Application Engineer – Belo Horizonte

Lead Application Engineer

Apply locations BELO HORIZONTE time type Full time posted on Posted 3 Days Ago job requisition id R47952

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence Design Systems Inc. is looking for a motivated Lead Application Engineer to work with us in Belo Horizonte, Brazil.

As a Lead Application Engineer , you will be part of the Custom IC & PCB team. Working directly with Cadence R&D and driving customer engagements, you will enhance your in-depth knowledge in nanometer design, unlock unique expertise in Physical verification, and level up your communication, customer, and sales skills. No matter where you are in your career, whether your next career step is to stay on the technical track, move up in management, or explore sales/marketing career opportunities, the skills and expertise you gain as an Application Engineer here at Cadence will put you miles ahead in your career advancement.

As a Lead Application Engineer , you will work side-by-side with our leading-edge customers. You will help them deploy Cadence's market-leading technologies in Physical/Signoff Verification and Parasitic Extraction to meet/exceed their Signoff targets, achieve faster design closure, and turn their design concepts into reality.

Job description:

• Resolves basic issues, assists in documentation and progress tracker.
• Cooperation and relationship formation with a sense of ownership for customer's major projects.
• Delivers training to customer to make them efficient with Cadence tools.
• Partners with customers & advocates while collaborating with the BU in developing effective solutions.

Requirements:

• Complete bachelor’s in computer science, computer Engineering or related areas.
• Exposure to Physical verification flows (i.e., DRC, LVS & FILL) or to Parasitic extraction flows desired.
• Ability to provide hands-on technical support to customer for Physical Signoff.
• Experience in physical verification rule writing or in parasitic extraction is a plus.
• In-depth understanding of Semiconductor Manufacturing process is a plus.
• Familiarity with Cadence Implementation tools (Innvous, Virtuoso, Allegro/APD) or similar industry tools.
• Programming skills like Linux, python, tcl or perl is a plus. Self-motivated and enthusiastically focused on problem solving.
• Strong technical and written communication skills in English.

Additional Job Details:

• Employment category: CLT
• Employment term: 40 hours/week.
• Hybrid work: Location: Av Contorno 5800, Belo Horizonte, Minas Gerais Brazil
• Competitive benefits.

Cadence is the only company that provides the expertise and tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play.

For more information, access Cadence .

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